1. Field of the Invention
The present invention relates generally to semiconductor devices. More particularly, the present invention relates to a recessed channel access transistor (RCAT) device for high-density dynamic random access memory (DRAM) applications.
2. Description of the Prior Art
As the size of semiconductor devices shrinks, the gate channel length decreases correspondingly, and short channel effect (SCE) and junction leakage current become very serious problems. Recessed channel access transistor devices (or RCAT devices in short) have been developed to suppressing the short channel effect by physically increasing the gate channel length without an increase in a lateral area of a gate electrode.
Typically, an RCAT transistor has a gate oxide layer formed on sidewalls and the bottom surface of a recess etched into a substrate, where a conductive substance fills the recess. Contrary to a planar gate type transistor having a gate electrode formed on a planar surface of a substrate, the RCAT transistor has a U-shaped channel along the surface of the recess. Therefore, the integration of the recessed-gate transistor can be increased.
However, in a conventional RCAT device, when a drain voltage (Vd) is applied to a capacitor that is electrically connected to an NMOS transistor, agate induced drain leakage (GIDL) problem may occur. The GIDL adversely affects the refresh or data retention characteristic of the DRAM device.